1. Field of the Invention
The present invention relates to the art of semiconductor manufacturing and more particularly to a technique for reshaping an electrode in a semiconductor etching device.
2. Description of the Relevant Art
It is well known that during integrated circuit manufacturing, whole wafers are coated with a layer or layers of various materials such as silicon dioxide, silicon nitride, or metallization. Unwanted material can be selectively removed using masked photolithography and etchants to leave, for example, holes in a thermal oxide where diffusions are to be made, or long strips of aluminum for electrical interconnect between individual circuit elements. Using conventional techniques, fine-line geometries can be produced by removing or etching select regions of material between the structures.
There are several etching techniques commonly used, including: wet chemical, electrochemical, pure plasma, reactive ion, ion beam milling, sputtering, and high temperature vapor. Wet etching generally involves immersing wafers containing select areas of photoresist in an aqueous etching solution. Wet etching, while the oldest and least expensive technique, is gradually being replaced by dry etching techniques such as plasma etching and a combination plasma/reactive ion etching (RIE). Plasma and RIE techniques, often called dry etching, are relatively new and are performed in low pressure gaseous plasma. Dry etching generally involves fewer safety hazards, less spent chemical disposal problems, and also produces finer line geometric structures.
Dry etching generally requires an etching chamber capable of receiving gaseous plasma and one or more wafers to be etched. The plasma can be pressurized within the chamber and, after etching is completed, the gaseous material and volatile byproducts can be pumped away or evacuated from the chamber. Operating pressure depends upon the material being etched, the plasma chosen, and may range from a few torr to fractions of a millitorr.
The etching chamber includes a pair of electrodes at opposing sides or ends of the chamber. One electrode is generally charged by a RF power supply while the other electrode is grounded. Typically, the powered electrode is DC isolated from the RF generator by a capacitor so that negative electron charge accumulates upon the powered electrode during one half of the RF cycle while positive ion charge accumulates during the next half cycle. Since electrons are more mobile than ions, a negative potential will build upon the powered electrode in order to charge the electrode negative with respect to the grounded electrode and the gaseous plasma between the electrodes. Depending upon conditions, the voltage differential may be several hundred volts.
Dry etching is achieved by placing one or more wafers upon the powered electrode. The present invention will be further explained with respect to one wafer placed on the powered electrode, it being understood that more than one wafer may be placed on the powered electrode during an etching process.
The wafer is positioned to receive positive ions directed from the plasma toward the negatively charged, powered electrode. The ions are accelerated substantially perpendicular to the wafer surface and embedded into the surface. The ions chemically react with the wafer surface. The amount of reaction is often referred to as the etch rate. Etch depth is related to the rate at which the chemical reaction occurs within the wafer. The higher the etch rate, the deeper the resulting etch depth.
It is imperative in dry etching that the etch rate be uniform across the surface of the wafer. A non-uniform etch rate will result in a non-uniform etch depth. This non-uniform etch depth may result in devices from certain areas of the wafer failing to meet design specifications.
Etch rate across the wafer can vary with variations of one or more process parameters including: (1) process parameters associated with the electrodes such as electrode voltage and electrode gap or spacing, (2) process parameters associated with the plasma including pressure, temperature, composition, flow rate, etc., and (3) process parameters associated with the wafer such as temperature. For example, etch rate will vary across the wafer surface with a variation of the plasma pressure across the wafer. Etch rate will also vary across the wafer surface with a variation of voltage across the electrodes due to a varition of electrode gap across the wafer.
Electrode gap variations in general can be controlled in accordance with U.S. Pat. No. 5,354,413, which is incorporated herein by reference. In the aforementioned patent, an electrode position controller is provided which attempts to ensure that the electrodes are properly parallel during the etching process.
The aforementioned technique maintains a uniform gap between the electrodes so long as the electrodes have oppositely facing, planar surfaces. It is well known, however, that the material which forms the upper electrode slightly precipitates during each etching due to the corrosive effects of the plasma. As a result, the lower surface of the upper electrode eventually becomes substantially non-planar after a number of wafers have been etched.
FIGS. 1 and 2 show cross sectional areas of eroded upper electrodes with lower surfaces which have eroded into a non-planar convex or concave shape. The convex or concave shape of these electrodes will produce a variation in electrode gap across the wafer which in turn produces a variation in etch rate and etch depth across the wafer surface. The variations in electrode gap caused by the non-planar surfaces as shown in FIGS. 1 and 2 can not be corrected by the technique disclosed in U.S. Pat. No. 5,354,413.
One solution to this non-planar surface problem is to replace the eroded upper electrode with a new electrode having a substantially planar lower surface. Electrodes, however, are expensive. Each time a worn electrode is replaced, the semiconductor etching device chamber must be opened which provides an opportunity for dust and other contaminants to enter the chamber. Moreover, replacing the worn electrodes is a time consuming process and does not solve the problem of variations in the other process parameters such as variations in plasma pressure or variations in wafer temperature. Variations of these parameters across the wafer, like the electrode gap variations, can produce non-uniform etch rates across the wafer which in turn may produce devices failing to meet design specifications.